High-power FET circuit
US4992764A · kind A · utility
19Cited by
2References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 21, 1989 |
| Grant date | Feb 12, 1991 |
| Priority date | — |
| Expiry date | Feb 21, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power FET includes a substrate of semi-insulating material having a top side and a ground side; an FET fabricated on the ground side of the substrate; and conductor means in the substrate extending from the drain electrode and the gate electrode on the ground side to the top side of the substrate. A ground plane on the ground side of the substrate contacts the source electrode of the FET and is spaced from the gate and drain electrodes to form a dome for minimizing ground inductance and maximizing heat transfer from the FET independent of the thickness of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.