Generation of a digital correction signal to compensate for gain mismatches in a sigma delta modulator
US4999625A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 2, 1990 |
| Grant date | Mar 12, 1991 |
| Priority date | — |
| Expiry date | Mar 2, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/418
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital correction signal is generated as a weighting actor for a first digital output signal applied to a digital integrator formed within a comb filter to compensate for gain mismatches between the stages of a sigma delta modulator and improve the resolution of the digital output signal at the output bus of an oversampling analog-to-digital converter. The current state the a first digital output signal provided at the output of one stage of the sigma delta modulator is compared with the previous state of the same signal. A detection signal is activated upon the occurrence of two consecutive states of the firrt digital output signal of the same level wherein such an occurrence corresponds to a noise spike in the digital output signal. The digital output signal is sampled during and after the spike, and the sampled values thereof are compared. The value of the digital correction signal is adjusted in response to the before-and-after comparison until the samples of the noise spike reach a predetermined minimum value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.