Vector processor
US5001626A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 1990 |
| Grant date | Mar 19, 1991 |
| Priority date | — |
| Expiry date | Apr 20, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a vector processor in which a plurality of load/store pipelines from a plurality of arithmetic units and a main storage are used for input/output operations of vector data on a plurality of vector registers in a parallel fashion, vector data is communicated between the respective modules constituting a physically closed system. A sequence of odd-numbered vector data elements and a sequence of even-numbered vector data elements each having a phase difference of a half of a period of a basic machine cycle are communicated at a speed of the basic machine cycle. The module includes vector registers, each vector register is constituted with two RAM arrays being independently addressable and being capable of performing read and write operations at a speed which is twice the basic machine cycle. The two vector data element sequences are converted into a vector data element sequence having a speed which is twice the machine cycle such that the respective vector data elements are alternately written and read in the RAM arrays at a speed which is twice the basic machine cycle. The vector data element sequence thus read out is converted into a sequence of odd-numbered vector data elements …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.