Sonet H4 byte generator
US5001708A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 1989 |
| Grant date | Mar 19, 1991 |
| Priority date | — |
| Expiry date | May 12, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S370/907
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An H4 byte generating algorithm is implemented by circuitry which includes counters for generating the H4 byte. The circuit is provisioned to indicate whether it is operating in a terminal multiplexer mode or an add-drop multiplexer mode. In the terminal multiplexer mode the counters are allowed to free run and continually produce successive H4 byte outputs. In the add-drop multiplexer mode selected counter outputs are compared with the received H4 byte and the number of mismatches is accumulated by a mismatch counter. When the mismatch counter reaches a predetermined number the value of the received H4 byte is loaded into the H4 byte counters and the mismatch counter is reset. Each time a proper match between H4 counter outputs and the received H4 byte is sensed, the mismatch counter is reset to 0. The presence of a red alarm will also result in the resetting of the mismatch counter and free running of the H4 byte counters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.