Pattern display signal generating apparatus and display apparatus using the same
US5003304A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | May 23, 1990 |
| Grant date | Mar 26, 1991 |
| Priority date | — |
| Expiry date | May 23, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/28
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A pattern display signal generating apparatus comprises a memory for storing predetermined pattern data and for outputting even-numbered bits and odd-numbered bits of the pattern data in parallel when scanned, a timing generator for generating an address for scanning the memory and for generating first and second clock signal having a predetermined phase difference, a first shift register for shifting the odd-numbered bits and outputting the same in series in synchronization with the first clock signal, a second shift register for shifting the even-numbered bits and outputting the same in series in synchronization with the second clock signal, and a logical operation circuit for performing at least one predetermined logical operation between outputs of the first and second shift registers to generate a pattern display signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.