Serial data receiver with phase shift detection
US5003308A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 1990 |
| Grant date | Mar 26, 1991 |
| Priority date | — |
| Expiry date | Mar 28, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/042
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An asynchronous serial data receiver for receiving a stream of data bits, characterized by a plurality of shift registers (54) into which samples corresponding to points within said data bit stream are read, different shift registers (54) holding a different set of said samples, said points being separated by most one half of a data bit period, and a decoder (60-90) responsive to said samples held in said shift registers (54) for recognizing points of known phase within said data assessed relative to which samples which corresponding to points within said data bits may be identified for reading. The invention provides a high speed serial receiver which is particularly suitable for use within disc drives and data storage and retrieval systems in general. The serial data receiver of the present invention does not require a clock synchronized with the incoming data. Furthermore the serial data receiver is able to share the sampling of the data bit stream between a plurality of shift registers (54) none of which need be clock more than once per data bit period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.