Linear nearest neighbor interconnect bus system
US5003508A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 7, 1989 |
| Grant date | Mar 26, 1991 |
| Priority date | — |
| Expiry date | Apr 7, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17381
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for providing data communication between concurrently operating random access memory and processing devices includes a set of interface nodes interconnected in series by bidirectional buses. Each node includes means for reading data at selected addresses within a random access memory and means for selectively transmitting that data outwardly to either one or both of the nearest neighbor nodes to which it is connected. Each node also includes means for receiving data from any nearest neighbor node to which it is connected, for writing that data into a selected address of random access memory, and for forwarding that data to another nearest neighbor node. Each node attaches a selected distance field to data it transmits to a nearest neighbor node, the distance field indicating the relative address of an intended destination node in terms of the number of nodes between the forwarding node and an intended destination. Each node is further adapted to receive and forward to nearest neighbor nodes messages generated by a processing device connected thereto and for controlling node operation according to said messages. Each node also attached an identification field to data tr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.