CMOS-ECL converter
US5004939A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 17, 1990 |
| Grant date | Apr 2, 1991 |
| Priority date | — |
| Expiry date | May 17, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/017518
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A CMOS-ECL converter contains a drive stage modified from the prior art and a connected output transistor. The driver stage comprises a resistor element and an n-channel field effect transistor. The resistor element can preferably be constructed with the assistance of a p-channel field effect transistor and is connected in series with the n-channel field effect transistor. The advantage of such an arrangement is that the capacitive load at the input of the CMOS-ECL converter is low because the resistor element or, respectively, the p-channel field effect transistor, offers no contribution to such an input load. The channel width of the p-channel field effect transistor can be set such that an adequately-high base current for the bipolar output transistor can be supplied.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.