Digital demodulator apparatus
US5005186A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 1988 |
| Grant date | Apr 2, 1991 |
| Priority date | — |
| Expiry date | Oct 13, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/38
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A digital demodulation apparatus which has a detector (11) for receiving transmission signals (S.sub.in) modulated under a multivalue quadrature amplitude modulation method in accordance with a honeycomb signal structure point arrangement. The detector produces I channel and Q channel demodulation signals. The apparatus also includes a discriminator (13) which converts the analog demodulation signals (Sa) to digital demodulation signals (Sd), a memory (21) which successively receives said digital demodulation signals (Sd) and reproduces corresponding original data. The read only memory (21) stores data representatives of the honeycomb signal structure point arrangement, and stores polarity bits (P) and error bits (.epsilon.) of the signal points.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.