Low reflection input configuration for integrated circuit packages
US5006820A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 3, 1989 |
| Grant date | Apr 9, 1991 |
| Priority date | — |
| Expiry date | Jul 3, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit package having a low reflection input pin comprising a high frequency signal conductor internal to the semiconductor package is provided by coupling a first input pin to a second input pin with a conductive path, the conductive path having a constant characteristic impedance which matches the characteristic impedance of an external signal line which is coupled to the first input pin. A portion of the conductive path forms a bonding pad using for wire bonding, or other bonding technique, between the conductive path and a bonding pad of the integrated circuit. In this manner the impedance mismatch between an external signal conductor and the integrated circuit bonding pad is eliminated, and the total impedance mismatch between the semiconductor package and the external signal line is greatly reduced, resulting in higher frequency operation of the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.