Method and apparatus for converting A/D nonlinearities to random noise
US5006854A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 1989 |
| Grant date | Apr 9, 1991 |
| Priority date | — |
| Expiry date | Feb 13, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/806
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for removing the effects of mismatched components in an A/D converter is described. The present invention dynamically rearranges the capacitors of an A/D converter so that physical mismatch is averaged out. In the preferred embodiment of the present invention, an array of equally-sized capacitors is coupled to a switching network. A successive approximation scheme is implemented in which the input signal is coupled through SAR switches to the capacitor array. Each switch is coupled to 2.sup.N-1 capacitors where N is the switch number. For example, in an 8-bit scheme, there are 3 switches with switch 1 coupled to one capacitor, switch 2 coupled to two capacitors, and switch 3 coupled to four capacitors. In this manner, eight levels of capacitance values can be defined. The present invention adds a scramble control code to control the switching array so that the physical capacitors themselves are coupled to different SAR switches at different times. This requires a scramble matrix of switches, which in the present invention requires N.times.2N switches where N equals the number of bits of control code. In this manner, the effects of any variations in the capaci…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.