Process for fabricating integrated circuits having shallow junctions
US5008217A · kind A · utility
20Cited by
2References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 8, 1990 |
| Grant date | Apr 16, 1991 |
| Priority date | — |
| Expiry date | Jun 8, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28556
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Direct contact to shallow junctions in integrated circuits and interconnection between these contacts is achievable by utilizing a specific aluminum CVD process. In this process the aluminum is deposited utilizing a triisobutyl aluminum precursor onto a substrate having a nucleation layer, e.g. a titanium nitride layer. By appropriate choice of this nucleation layer to control the nucleation of the depositing aluminum, suitable contact is made while avoiding void defects present in the absence of such layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.