Packet data generator
US5010549A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 1989 |
| Grant date | Apr 23, 1991 |
| Priority date | — |
| Expiry date | Apr 20, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04H20/28
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A packet data generator for generating complementary packet data which are added to information data for packet transmission via a high speed PCM transmission line. The packet data generator includes first and second memories for storing the complementary packet data; an address counter for counting an address at the timing of a synchronization signal of the high speed PCM transmission line; a multiplexer for changing the connection of the first and second memories; and a synchronization circuit for outputting a switching signal to the multiplexer in synchro with an output from the address counter. Since two memories are provided, while one memory is used for supplying complementary packet data at the data transmission speed, the other memory can be used for storing new complementary packet data at the CPU processing speed. The new complementary packet data are supplied by switching from the one memory to the other memory in synchro with a synchronization signal of the high speed PCM transmission line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.