Laminated structure of compound semiconductors
US5011550A · kind A · utility
15Cited by
3References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 12, 1988 |
| Grant date | Apr 30, 1991 |
| Priority date | — |
| Expiry date | May 12, 2008 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/933
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A laminated structure of compound semiconductors comprising a IV semiconductor underlying substrate, a first III-V compound semiconductor layer that is formed as an intermediate layer on the IV compound semiconductor underlying substrate, and a second III-V compound semiconductor layer that is formed on the intermediate layer, wherein the thermal expansion coefficients of the IV compound semiconductor underlying substrate, E.sub.ts, the first III-V compound semiconductor layer, E.sub.t1, and the second III-V compound semicondductor layer, E.sub.t2, have the following relationship: E.sub.t1 >E.sub.t2 >E.sub.ts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.