Production of an integrated memory cell

US5011787A · kind A · utility

Assignee

• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventor

• Pierre Jeuch · Chauny, FR

Key dates

• Filing date: Jul 7, 1989
• Grant date: Apr 30, 1991
• Expiry date: Jul 7, 2009

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/685

Abstract

The invention concerns the method to produce an EPROM or EEPROM type integrated memory cell on a semiconductor substrate. The cell comprises memory points, electrically insulated from each other, each memory point comprising a source (4), a drain (6), a floating gate (350), a control grid (38), a channel (5) situated under the floating gate (350), the source (4) and the drain (6) being situated on both sides of the floating (350), the floating gates of each memory point being laterally distant and insulated along a first direction (X) from one or two other floating gates, the production of the cell comprising a stage for embodying lateral insulations (320) of the floating gates along the first direction (X), then a stage for embodying the actual floating gates (350), which makes it possible to obtain insulations between submicronic floating gates. Application for the embodiment of integrated memory cells.