Logarithmic amplifier with gain control
US5012140A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 19, 1990 |
| Grant date | Apr 30, 1991 |
| Priority date | — |
| Expiry date | Mar 19, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06G7/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A logarithmic amplifier includes a first diode wherein the anode receives an input signal input signal current and a standing current. The cathode of the first diode is coupled to the emitter of a PNP transistor. The collector of the PNP transistor is coupled to the anode of a second diode. A bias current is added to the emitter and substracted from the collector of the PNP transistor to provide a lower emitter impedance. The cathode of the second diode is coupled to a negative supply voltage through a load resistor. A feedback network including an emitter coupled pair of NPN transistors samples the voltage at the anode of the second diode and sinks a current from the base of the PNP transistor. The voltage at the anode of the first diode is amplified to provide a logarithmic output voltage. The output voltage may be attenuated and applied to the base of the PNP transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.