Method and apparatus for clock recovery and data retiming for random NRZ data
US5012494A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 7, 1989 |
| Grant date | Apr 30, 1991 |
| Priority date | — |
| Expiry date | Nov 7, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for recovering a clock signal from a random NRZ data signal is shown to include a phase detector for detecting the phase difference between the random NRZ data signal and a clock signal and for generating a phase signal representative of the phase difference. The phase signal is a binary signal having first and second logic levels, wherein the first logic level is representative of the clock signal having an early phase relationship with the data signal and wherein the second logic level is representative of the clock signal having a late phase relationship with the data signal. Clock recovery also incorporates an integrator for integrating the phase signal over a period of time and for generating an integration signal representative of such integration and an oscillator for generating the clock signal at a clock frequency responsive to both the phase signal and the integration signal. The clock frequency is determined by a centering factor and an offset factor. The centering factor is controlled by the phase signal. There is also shown a particular phase detector, several integrators and a preferred oscillator for practicing the invention.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.