Method and apparatus for predicting the metastable behavior of logic circuits

US5014226A · kind A · utility

Assignee

• LSI Logic Corporation · US

Inventors

• Jens Horstmann · Goldkronach, DE
• Robert Lyle Coates · Huntsville, US
• Hans W. Eichel · Braunschweig, DE

Key dates

• Filing date: Sep 29, 1988
• Grant date: May 7, 1991
• Expiry date: Sep 29, 2008

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F11/2205
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A circuit for detecting erroneous logic outputs due to metastable behavior in multistable devices (i.e. flip flops) includes a digitally programmable delay unit integrally formed on a common substrate with the multistable devices. Strong correlations between the operating characteristics of the programmable delay unit and the multistable devices may be established during tests for different temperatures, power supply settings and fabrication process variations. Such integration and the digital nature of the programmable delay unit enables repeatable test results and strengthens confidence in predictions that are derived from tests conducted to determine the mean time between failure that is to be expected from the multistable devices. In one embodiment, metastable devices of different design are integrally formed on the common substrate so that comparisons can be made among the metastable behaviors of the different designs. In a second embodiment, metastable devices of the same design but supplied with different actuating signals are formed on the common substrate for comparison of their respective metastable behaviors.