Parallel time slot interchanger matrix and switch block module for use therewith
US5014268A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 1989 |
| Grant date | May 7, 1991 |
| Priority date | — |
| Expiry date | Jan 11, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q11/08
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A parallel time slot interchanger, particularly for use in telecommunication switching, comprises a plurality of switch groups, with each switch group containing a second plurality of channels. The parallel time slot interchanger incroporated a matrix-type architecture, with each module of the matrix comprising a switch block which in turn incorporates a switch memory, connect memory and associated control circuitry. The connect memory of each switch block is controlled by the control circuitry of that block. The data stored in the connect memory contains switch memory address information for reading channel data stored within the switch memory of the same switch block so as to be able to perform a time slot switching function during any given time slot of the parallel time slot interchanger. Each switch block is uniquely identified within its corresponding switch group so that only one switch memory address location is read and output during any time slot for each switch group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.