Deferred comparison multiplier checker
US5016208A · kind A · utility
2Cited by
3References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 11, 1989 |
| Grant date | May 14, 1991 |
| Priority date | — |
| Expiry date | Jul 11, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a data processing system, a multiplication operation is immediately followed by a redundant multiplication operation, using the same, albeit altered, operands, to check the initial result. The initial result is immediately available for use, but the check is not performed until some time later. The original operands are altered for the redundant multiplication operation by shifting one operand 1 bit, and swapping them before multiplication.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.