Data transfer controlling apparatus for direct memory access
US5018098A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Apr 27, 1988 |
| Grant date | May 21, 1991 |
| Priority date | — |
| Expiry date | Apr 27, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/285
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data transfer controlling apparatus for direct memory access comprising one or more first microaddress registers, each of which registers stores microaddress information for program processing of the data transfer for a corresponding channel; a second microaddress register which stores microaddress information for program processing other than the program processing of the data transfer; a micro read only memory operatively connected to said first and second microaddress registers, for storing microinstructions and outputting a predetermined microinstruction in accordance with microaddress information read out from a selected one of the first microaddress registers and the second microaddress register; and an incremental element operatively connected to said first and second microaddress registers, for incrementing the value of the microaddress information read out from the selected one of the first microaddress registers and the second microaddress register, and for writing the incremented microaddress information to the selected one of the first microaddress registers and the second microaddress register; the microaddress information stored in one of the first microaddress regi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.