Method and circuit for scanning capacitive loads
US5021774A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 1990 |
| Grant date | Jun 4, 1991 |
| Priority date | — |
| Expiry date | Jan 17, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0297
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A high-speed scanning method uses a K(K.gtoreq.3)-number of semiconductor switch elements each having a first main electrode responsive to an input signal, a second main electrode, and a control electrode responsive to a control signal for controlling the transmissive and intransmissive states of said input signal from the first main electrode to the second main electrode; and capacitive loads connected respectively with the second main electrode of each of said K-number of semiconductor switch elements, for shifting one of the K-number of semiconductor switch elements sequentially with a predetermined period from the transmissive state to the intransmissive state or vice versa, wherein, the time, for which an arbitary L(K>L.gtoreq.2)-number of semiconductor switch elements of adjacent scans are rendered transmissive, and the time, for which the L-number of semiconductor switch elements are rendered intransmissive, are included in at least one frame period, to elongate the period for which the scanning signals fluctuate, thereby permitting use of low-frequency semiconductor switches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.