Data Processor
US5021951A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 25, 1990 |
| Grant date | Jun 4, 1991 |
| Priority date | — |
| Expiry date | Jul 25, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0653
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor has a register in which attributive data corresponding to a memory to be coupled to the microprocessor is written, and a control circuit which controls address signals to be supplied to the memory in accordance with the attributive data. The attributive data is composed of range data for discriminating ranges of address data supplied to an address bus, system data indicative of addressing systems of the memories corresponding to the respective address ranges, and bit number data indicative of numbers of address bits of the memories. Thus, in a case where the memory to be accessed is of an address multiplexing system as in a dynamic RAM, the address data of the address bus is divided into row address data and column address data, which are then supplied to the memory in time division.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.