"Software programmable logic array utilizing ""and"" and ""or"" gates"
US5023775A · kind A · utility
121Cited by
14References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 15, 1990 |
| Grant date | Jun 11, 1991 |
| Priority date | — |
| Expiry date | Oct 15, 2010 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S706/924
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A software programmable logic array ("SPLA") is disclosed for creating a logic array which can be dynamically programmed to provide any combination of predetermined outputs from any combination of desired inputs. The foregoing is accomplished by providing a first plane of programmable bits for producing a plurality of AND terms which are input to a second plane of programmable bits for producing a plurality of OR terms, which are then input into a third plane of programmable bits for producing a plurality of outputs, each having a desired polarity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.