Fault-resistant solid-state line driver
US5025178A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 18, 1988 |
| Grant date | Jun 18, 1991 |
| Priority date | — |
| Expiry date | Oct 18, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018571
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A fault-resistant, solid-state line driver having a pair of P-type transistors in series between a bus output and a voltage source, a pair of N-type transistors in series between the bus output and a connection to ground, and a pair of input lines, one of the input lines being connected to both the gate of the P-type transistor closest to the voltage source and the gate of the N-type transistor closest to the bus output, the other input line being connected to both the gate of the P-type transistor closest to the bus output and the gate of the N-type transistor closest to the connection to ground. Such a line driver is particularly useful in devices utilizing wafer-scale levels of integration, as the failure of any one of the driver's transistors will not result in a shorting of the bus output to either ground or the voltage source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.