Method and apparatus for coupling an ECL output signal using a clamped capacitive bootstrap circuit
US5027013A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 1990 |
| Grant date | Jun 25, 1991 |
| Priority date | — |
| Expiry date | May 9, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01812
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for providing ECL output signals to a capacitative load includes differential amplification of input signals with a first output of a differential amplifier connected for establishing a voltage level between voltage limits V.sub.cc and V.sub.ee at the output of an output driver in response to variations in the first amplifier output. A pull-down transistor has a collector connected to the output driver output, an emitter connected to the V.sub.ee voltage source, and a base coupled through a boost capacitor to the second amplifier output. A voltage clamp embracing a clamp transistor with a base connected to receive a predetermined control voltage has an emitter connected to the boost capacitor and the pull-down transistor base and a collector connected to the V.sub.cc voltage source. The clamp transistor is operated in Darlington configuration to provide a minimum discharge impedence to the base of the pull-down transistor. A recovery capacitor is connected between the clamp transistor base and the first duplifier output to speed up the clamp transistor's operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.