Circuit configuration for protecting an electronic circuit against overload
US5027181A · kind A · utility
14Cited by
1References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 8, 1990 |
| Grant date | Jun 25, 1991 |
| Priority date | — |
| Expiry date | Jun 8, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/041
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A circuit configuration for protecting electronic circuits against overload of a supply voltage source includes a voltage-limiting configuration, such as a Zener diode. A depletion layer field effect transistor is connected upstream of the voltage-limiting configuration and has interconnected gate and source terminals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.