Interpolation circuit for digital signal processor
US5027209A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 1989 |
| Grant date | Jun 25, 1991 |
| Priority date | — |
| Expiry date | Mar 15, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/895
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An interpolation circuit, in which a digital signal produced by sampling and quantizing an analog information sequentially is encoded so that, in case a certain one of the encoded sample data is erroneous, a correct data in place of the erroneous sample data is prepared as an interpolation data by interpolating other correct sample data. The interpolation circuit includes: a first extrapolation circuit for generating a first extrapolation data by extrapolating two sample data preceding the erroneous sample data to the position of said erroneous sample data, a second extrapolation circuit for generating a second extrapolation data by extrapolating the two sample data succeeding the erroneous sample data to the position of the erroneous sample data, and an averaging circuit for generating the interpolation data by arithmetically averaging the first and second extrapolation data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.