Synchronous protocol data formatter
US5029163A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 1988 |
| Grant date | Jul 2, 1991 |
| Priority date | — |
| Expiry date | Mar 18, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/1647
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A synchronous protocol data formatter handles all 24-32 channels of a so-called primary rate version of a digital multiplexed interface or ISDN Primary Rates Interface for a communication system. The formatter relieves the host computer of the local area network of some highly specialized tasks, and, at the same time, provides the following augmented capabilities, which exceed those required by the C.C.I.T.T. standard, I.431: PA0 1. dynamic channel bandwidth allocation can assign arbitrary (even non-adjacent) time slots to create a super channel; PA0 2. a circular interrupt-queue in a shared memory enables the formatter and the host computer of the local area network to interact efficiently in updating and responding to changing conditions; and PA0 3. cyclical redundancy codes can be used on a more flexible basis than theretofore, e.g., can be generated upon only address and control fields for digitized voice signals, or, in a relay mode, can substitute an existing cyclical redundancy code to guard against memory errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.