Transaction system of the electronic purse type
US5030806A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 31, 1990 |
| Grant date | Jul 9, 1991 |
| Priority date | — |
| Expiry date | Oct 31, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG07F7/02
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A card (2) having a memory microcircuit (20) with access thereto under the control of a hard-wired logic circuit or a microprocessor (21) is suitable for cooperating with a terminal (1). A memory in EPROM technology (or in E.sup.2 PROM technology) includes value words (e.g., thirty-two bit words comprising twenty-five value bits, four bits for coding the value unit of each value bit, and a verification bit). By loading a plurality of words into the memory so as to set up a sequence of value units spread over successive powers of 2, the calculation means can split up the amount of any transaction less than the maximum value of the card into binary form very simply, and then consume not more than one bit per value unit (optionally other than the most significant value unit) in respect of each transaction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.