Device for multi-precision and block arithmetic support in digital processors
US5031135A · kind A · utility
38Cited by
5References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 19, 1989 |
| Grant date | Jul 9, 1991 |
| Priority date | — |
| Expiry date | May 19, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/49921
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device for multi-precision and block arithmetic support in a digital processor including a multiplier for multiplying two signed, unsigned or signed and unsigned binary numbers and having a dynamic range greater than -1 to +1, an arithmetic and logic unit for performing arithmetic and logic operations, a barrel shifter for barrel shifting at least one binary number, shifters for selectively shifting the output of the multiplier and multiplexers for selecting and interconnecting the outputs and inputs of the multiplier, the arithmetic and logic unit, the barrel shifter and the shifters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.