Sense amplifier
US5031145A · kind A · utility
33Cited by
3References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 29, 1990 |
| Grant date | Jul 9, 1991 |
| Priority date | — |
| Expiry date | Mar 29, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sense amplifier for determining the logic state of a memory cell consists of a switch transistor (N2) for receiving current during sensing from the memory cell (NV1), a nonvolatile transistor (NV2) providing a reference current which is compared to a representation of the sensed current through the switch transistor (itself dependent on the state of NV1), a bistable latch (N4P4, N5P5) which is switched into one or other of its states depending on the result of the comparison, and a feedback from the output of the latch (NODE 3) to the gate of the switch transistor (N2) to isolate the amplifier from the memory cell after sensing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.