3-D integrated circuit assembly employing discrete chips
US5032896A · kind A · utility
117Cited by
9References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 1989 |
| Grant date | Jul 16, 1991 |
| Priority date | — |
| Expiry date | Aug 31, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15153
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A 3-D IC chip assembly is formed from stacked substrates in which each individual substrate has a plurality of different IC chips retained in respective recesses. Conductive feedthroughs extend through the substrate from the side where the chips are located to the opposite side, with the chips electrically connected to the feedthroughs. An electrical routing network on the opposite side of the substrate from the chips provides desired interconnections between the chips by connecting to the feedthroughs. The routing can be formed by standard photolithographic techniques.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.