Patent · US Expired

Method of recording successive balances in an electronic memory, and a system for implementing said method

US5033021A · kind A · utility

22Cited by
4References
13Claims
0Family size

Inventor

Key dates

Filing dateSep 28, 1988
Grant dateJul 16, 1991
Priority date
Expiry dateSep 28, 2008

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG07F7/02
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

A method of recording successive balances in an electronic memory constituted by a plurality of memory locations each having an initial state "0" and a final or "written" state "1". The memory includes at least one memory region split into two memory zones, with each of the two memory zones including the same number of memory locations, and with each memory location occupying a rank in an ordered relationship defined in the memory zone to which is belongs, with two memory locations of corresponding rank constituting a pair of memory locations which is likewise distinguished from the other pairs by a rank. Before each recording event, the region includes a single reference pair CR.sub.n-1 having its two memory locations in different states, with the other pairs being constituted by memory locations which are both in the initial state C(O,O) or memory locations which are both in the final state C(1,1). In order to write a new balance S.sub.n corresponding to a number p of units, where possible, the memory location in the reference pair CR.sub.n-1 which was in the initial state "0" is caused to change to the final state "1", and a new reference pair CR.sub.n is written at a rank such …

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.