On-chip register setting and clearing
US5033025A · kind A · utility
Inventor
Key dates
| Filing date | Dec 21, 1989 |
| Grant date | Jul 16, 1991 |
| Priority date | — |
| Expiry date | Dec 21, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit device has an on-chip processor and at least one on-chip digital register for storing plural bits therein. The bit contents of the register are written, selectively transformed, and read out of the register during processing of data by the processor and related circuitry. Peripheral instructions such as those from an interrupt source may contend with instructions from the processor for setting and clearing one or more bits in the register. To permit setting and clearing a unique bit in the register without affecting other bits in the register or the capability of the contending source to perform its instructions on one or more of these other bits, three separate addresses are provided for bit set, bit clear, and direct write of the register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.