Output control circuit for reducing through current in CMOS output buffer
US5034629A · kind A · utility
39Cited by
6References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 16, 1990 |
| Grant date | Jul 23, 1991 |
| Priority date | — |
| Expiry date | Jul 16, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0948
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an output circuit for use in a semiconductor IC comprising a CMOS transistors constituting an output buffer, a transfer gate of CMOS structure is connected between the gates of the CMOS transistors as a resistive element. The transfer gate reduces the changes in the gate potentials of output transistors, which occur when logic inputs are supplied to the gates of the output control transistors. Hence, the deformation of the output waveform, which has resulted from the through currents flowing through the output transistors, is minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.