Digital-to-analog converters with improved linearity
US5036322A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 1989 |
| Grant date | Jul 30, 1991 |
| Priority date | — |
| Expiry date | Jun 2, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/785
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
High accuracy is achieved by employing, in conventional DAC architectures, very accurate current sources. To create these high-accuracy current sources, the outputs of several smaller, less accurate, nominally equal current sources are summed. A procedure is taught for selecting the number of current sources to achieve an arbitrary degree of accuracy with a desired level of confidence. Assuming the current sources are taken from a population whose output currents deviate from a design value according to a normal distribution, the minimum number of constituent current sources, n, required to provide an accurate total current is given by the formula n=(Z.sigma./E).sup.2, where Z is a number which corresponds to the probability that the output will fall within an error band E (i.e., a predetermined accuracy level) with a predetermined level of confidence, .sigma. is the standard deviation of the population.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.