Thin film semiconductor array device
US5036370A · kind A · utility
55Cited by
2References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 2, 1990 |
| Grant date | Jul 30, 1991 |
| Priority date | — |
| Expiry date | Jul 2, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/0206
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The production of a thin film transistor array device having a gate wiring on an insulated substrate. The gate wiring has an inner gate wiring having a first metal layer formed on the insulated substrate and a second metal layer whose etching speed is faster than that of the first metal layer, the first metal layer and the second metal layer being overlapped so as to constitute a dual structure, and an outer gate wiring covering the inner gate wiring.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.