Image memory data processing control apparatus
US5036475A · kind A · utility
22Cited by
4References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 2, 1988 |
| Grant date | Jul 30, 1991 |
| Priority date | — |
| Expiry date | Nov 2, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/127
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An image memory data processing control apparatus having an image memory unit divided into a plurality of block memories, for each of which each pixel register and each timing control means are disposed, whereby a high-speed data drawing may be made. When executing a bitblt processing, writing decoders and reading decoders select modules associated with the pixel registers concerned. Data are read out from the image memory unit and data obtained by a raster operation are written into the image memory unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.