Multiple mode-set for IC chip
US5036495A · kind A · utility
20Cited by
2References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 28, 1989 |
| Grant date | Jul 30, 1991 |
| Priority date | — |
| Expiry date | Dec 28, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and device for setting at least three operating modes of a memory device is provided. The voltage signal is sensed at a first input and an enable signal is sensed at a second input. When an enable signal is received at a second input the memory device operates at the first operating mode if the voltage state at the first input is low; it operates at a second mode if the voltage state at the second is high; and it operates at a third operating mode if the voltage at the first input changes after the enable signal is received at the input. Also a four mode operation can be achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.