Protected Darlington transistor arrangement
US5038054A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 1989 |
| Grant date | Aug 6, 1991 |
| Priority date | — |
| Expiry date | Jul 14, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0826
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A protected Darlington transistor arrangement comprising: first (2) and second (4) bipolar transistors each having a base, a collector and an emitter, the base of the first transistor being coupled to the base (B) of the Darlington transistor, the collectors of the first and second transistors being coupled to the collector (C) of the Darlington transistor, the emitter of the first transistor being coupled to the base of the second transistor, and the emitter of the second transistor being coupled to the emitter (E) of the Darlington transistor; and a third bipolar transistor (6) having a base, a collector coupled to the collector of the Darlington transistor, and an emitter, wherein the Darlington transistor arrangement further comprises: a Zener diode (8) coupled between the collector of the Darlington transistor and the base of the third transistor, the base of the third transistor being coupled to the emitter of the second transistor, and the emitter of the third transistor being coupled to the base of the second transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.