Levelling control circuit
US5038112A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 8, 1990 |
| Grant date | Aug 6, 1991 |
| Priority date | — |
| Expiry date | May 8, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G7/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A levelling control arrangement for an RF transmitter circuit which additionally compensates for filter ripple, i.e. frequency dependant power variations caused by the filter disposed between a transmitter amplifier and an antenna. The forward and reflected power is sampled by a dual directional coupler between the amplifier and the filter. Signals V.sub.fwd and V.sub.rev are thus obtained indicative of the forward and reflected power levels respectively. The reflected signal V.sub.rev is subtracted from the forward signal V.sub.fwd at comparator and the difference signal V.sub.diff is compared with a reference signal Vref at comparator to produce a signal V.sub.c which is used to control the gain of the amplifier in such manner that the power developed by the amplifier increases as the signal V.sub.rev increases and vice versa. To protect against excessive reflected power levels a limiter may be included which causes the power developed by the amplifier to be reduced only if V.sub.rev exceeds a pre-set threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.