Circuit configuration for an integratable and controllable ring oscillator
US5038118A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 5, 1990 |
| Grant date | Aug 6, 1991 |
| Priority date | — |
| Expiry date | Sep 5, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0315
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit configuration of an integratable and controllable ring oscillator for generating a clock signal includes first and second stages being connected between supply terminals and having input and output terminals. The output terminal of the first stage is connected to the input terminal of the second stage. An inverter is connected between the output terminal of the second stage and the input terminal of the first stage. The input terminal of the second stage supplies a clock signal. Each of the stages includes first and second transistors having load paths connected between the supply terminals in a series circuit with a connecting point between the transistors. The second transistor has a gate terminal connected to the input terminal. The first transistor determines the frequency of the clock signal, is controllable in accordance with a control variable and acts as a current source. A capacitor has one terminal connected to the connecting point and another terminal connected to a fixed potential. A decoupling stage is connected between the output terminal and the connecting point.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.