Information processing apparatus having address expansion function
US5038280A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 1988 |
| Grant date | Aug 6, 1991 |
| Priority date | — |
| Expiry date | Dec 22, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/322
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information processing apparatus having address expansion function for changing over the address width of instructions and operands comprises latch means storing therein an address mode and having contents updated in accordance with the address modes of succedding instructions including an instruction of branch destination for a branch instruction. When an address mode changeover instruction of branch type is executed, fetch of a train of instructions of branch destination in advance is performed in accordance with the address mode stored in the latch means, and operand fetch synchronized to instruction decoding is performed in accordance with the address mode stored in the latch means. Further, there is provided an operand refetch address queue for performing refetch in case operand fetch is not accepted by a memory. Corresponding to each refetch address of the queue, the address mode of that address is fetched from the latch means and stored. Each operand refetch is performed in accordance with the address mode to specified in that refetch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.