Method and circuit arrangement for providing programmable hysteresis to a differential comparator
US5039888A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 1989 |
| Grant date | Aug 13, 1991 |
| Priority date | — |
| Expiry date | Nov 14, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/3565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus are disclosed for providing programmable hysteresis to a differential comparator. Programmable hysteresis is accomplished by adding voltage followers to the input stage and a current steering network to the output stage of the comparator such that DC bias currents flowing in the current steering network are mirrored via current mirrors so as to flow through the voltage followers at the input stage. By adding a desired offset current to one of the two input voltage follower DC bias currents in dependence on the output state of the comparator in such a manner as to provide positive feedback, an offset voltage is generated due to the unequal voltage drops of the voltage followers resulting in hysteresis which can be controlled in real-time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.