Amplifier arrangement
US5039954A · kind A · utility
16Cited by
2References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 4, 1990 |
| Grant date | Aug 13, 1991 |
| Priority date | — |
| Expiry date | May 4, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/223
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The gain of a cascode amplifier arrangement comprising a first transistor (N1), a second transistor (N2), a current source (J1), an input terminal (1) and an output terminal (3) is increased by adding an amplifier (A) having a non-inverting input (v1), an inverting input (v2) and an output (v0), which are coupled to a reference voltage terminal (2), to the mutually coupled electrodes of the first transistor (N1) and the second transistor (N2), and to the control electrode of the second transistor (N2) respectively. As a result the gain of the arrangement is higher and without a reduction of the unity-gain-bandwidth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.