Delta-sigma analog-to-digital converter with chopper stabilization at the sampling frequency
US5039989A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 1989 |
| Grant date | Aug 13, 1991 |
| Priority date | — |
| Expiry date | Oct 27, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/458
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A chopper stabilized analog-to-digital converter includes an analog modulator (10) and a digital filter (12). The analog modulator (10) is comprised of four integrators, a first integrator (20) which is continuous time and the remaining stages of integration (22) which are either continuous or discrete. The first integrator (20) is a chopper stabilized integrator which is comprised of a chopper stabilized differential amplifier (32) which has a single ended output and operates in a continuous time mode. The modulator has a zero that is located at the harmonics of the sampling frequency of the modulator and the chopping clock for the chopper stabilized operation operates at the sampling frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.