Partially distributed method for clock synchronization
US5041966A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 1988 |
| Grant date | Aug 20, 1991 |
| Priority date | — |
| Expiry date | Oct 5, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a distributed system comprising a plurality of processors coupled to one another, each processor comprises a controllable clock circuit which indicates a local time. Clock synchronization methods are based on the idea in which randomly selected M processors out of the total N processors cooperate to adjust the controllable clock circuits of all processors in the distributed system. Three types of methods are described. In a first one of the methods, all processors randomly selects M processors, respectively, at time instants which are different from one another, and each processor adjusts its own controllable clock circuit to an average of the local times of the selected M processors. In a second method, each processor transmits its own local time to randomly selected M processors and adjusts its own controllable clock circuit to the average of received local times. In a third method, all processors adjust their controllable clock circuits to the average of received local times issued by randomly selected M processors. Fault tolerance against each processor is taken into account in their methods. Their methods can be applied to a sufficient large distributed system because of a …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.