Memory usage system
US5042003A · kind A · utility
18Cited by
2References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 6, 1988 |
| Grant date | Aug 20, 1991 |
| Priority date | — |
| Expiry date | Jul 6, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0623
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved means and method for expanded memory system access and control is disclosed. A logic array in the expanded memory control circuitry which accesses and controls up to two separate expansion boards through the use of static random access memory as register circuits and octal buffers for addressing. The control and access method implemented through a state machine in the logic array provides the operation of the improved expanded memory system to control additional expansion boards and to access the appropriate memory locations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.