Circuit for limiting the short circuit output current
US5045724A · kind A · utility
2Cited by
3References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 18, 1989 |
| Grant date | Sep 3, 1991 |
| Priority date | — |
| Expiry date | Oct 18, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0136
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A TTL gate (22) includes a current generating circuit (24) comprising an NPN transistor (30) having its base coupled to a diode (24) and its emitter coupled to one of the gate's output transistors (14). Transistor (30) enables diode (24) to deliver a high current of short duration to the output OUT responsive to a low-to-high output transition. The current provides low-to-high output transition while protecting output transistor (14) from damaging currents caused by a short circuit at output OUT.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.